CRYPTOGRAPHIC IMPLEMENTATION RESISTANT TO SIDE CHANNEL ATTACKS ON RECONFIGURABLE HARDWARE

The advent of the Internet of things has revolutionized the way we view the infrastructure of information technology and constantly pushes the boundaries of amalgamating the physical world with computer-based systems. For instance, allowing objects to sense and be controlled remotely across a network and forming technology hubs like smart grids, smart homes, virtual power plants, and smart cities. However, in today's data-intensive computation-driven services, security and data privacy is perhaps the largest of the pitfalls.\ To give an example to support my assertion, according to Business Insider intelligence survey which was conducted in the last quarter of 2014, 39 percent of respondents felt that security is the biggest concern in adopting Internet of things technology. Security, trust, and privacy have always played a crucial part in computer security and with the advent of technologies like Internet of things & Cyber physical systems, recently the number of devices connected to the internet has gone up, thus the need for security has also increased. The art of keeping messages secret is cryptography, while cryptanalysis is a study attempting to defeat cryptographic techniques. Strong cryptographic algorithms are just the beginning for securing your device. Current cryptographic algorithms have very high standards of security. For embedded devices connected to a network uses a special type of cryptographic algorithms called lightweight cryptography systems, which are highly resource efficient. However, these cryptographic implementations are not as secure as full-fledged algorithms used in computer systems. There is something called as power profile which can leak information from the card. There are software and hardware implementations of the cipher which can lead to timing attacks. To tackle this We propose an AES cryptographic implementation that is resistant to power side channel attacks. The deliverable from this thesis is the implementation of AES algorithm on a 32-bit Cortex M4 microcontroller and then applying three different side channel attack techniques: differential power attack, correlation, power attack and differential fault analysis techniques to leak the key of AES-128 so that security of the device is compromised and proposing two countermeasures to make the AES implementation resistant to side channel attacks.