Synthesis of synchronous sequential machines



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Synthesis of a sequential machine is usually divided into four steps. 1. Development of a state diagram from a word problem. 2. Building a state table and an output table from the state diagram and reducing the state table, if possible. 3. Making the state assignments on the state table. 4. Choosing the memory element and synthesizing the logic. The approach taken to the synthesis problem in the four steps is ideal, but the classical tools of the state diagram and state tables are cumbersome for synthesizing larger machines. The state diagrams are not formulated well enough to allow the designer to use them without additional information. The state table which represents the next state as a function of the present inputs and outputs becomes larger as the number of inputs increase even though there is a small number of states. The state assignment techniques do not take advantage of the new MSI and LSI logic elements available to the contemporary logic designer. The approach taken to the synthesis problem in this thesis is to describe a flow charting method which will allow a physical description of the machine. Also, a new way to represent the transition function is developed whose size will be independent of the number of inputs and a state assignment technique is developed to allow todays designers to take advantage of the new MSI, LSI technology.