Sequential machine reduction and state assignment using partitions in a lattice algebra

dc.contributor.advisorBargainer, James D., Jr.
dc.contributor.committeeMemberDonaghey, Charles E.
dc.contributor.committeeMemberLee, Samuel C.
dc.contributor.committeeMemberMotard, Rodolphe L.
dc.contributor.committeeMemberPaskusz, Gerhard F.
dc.contributor.committeeMemberWhitaker, Thomas N.
dc.creatorMorehouse, Richard A., Jr.
dc.date.accessioned2022-07-29T17:50:02Z
dc.date.available2022-07-29T17:50:02Z
dc.date.issued1973
dc.description.abstractA unified theory is presented which provides a logic designer with a practical method for performing sequential machine state reduction and state assignment. The theory of using partitions in a lattice algebra is developed for these areas and algorithms are presented for practical utilization by either hand or computer-aided methods. The theory and algorithms are then extended to a more general type of analysis. A computer program has been written to perform state reduction and state assignment on any type of sequential machine by using S.P. partitions in the unified concept presented. A problem-oriented language is included in this program to allow a designer to describe a sequential machine in a natural manner.
dc.description.departmentElectrical and Computer Engineering, Department of
dc.format.digitalOriginreformatted digital
dc.format.mimetypeapplication/pdf
dc.identifier.other13857888
dc.identifier.urihttps://hdl.handle.net/10657/10669
dc.language.isoen
dc.rightsThis item is protected by copyright but is made available here under a claim of fair use (17 U.S.C. Section 107) for non-profit research and educational purposes. Users of this work assume the responsibility for determining copyright status prior to reusing, publishing, or reproducing this item for purposes other than what is allowed by fair use or other copyright exemptions. Any reuse of this item in excess of fair use or other copyright exemptions requires express permission of the copyright holder.
dc.titleSequential machine reduction and state assignment using partitions in a lattice algebra
dc.type.dcmiText
dc.type.genreThesis
thesis.degree.collegeCullen College of Engineering
thesis.degree.departmentElectrical Engineering, Department of
thesis.degree.disciplineElectrical Engineering
thesis.degree.grantorUniversity of Houston
thesis.degree.levelDoctoral
thesis.degree.nameDoctor of Philosophy

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