A unified theory is presented which provides a logic designer with a practical method for performing sequential machine state reduction and state assignment. The theory of using partitions in a lattice algebra is developed for these areas and algorithms are presented for practical utilization by either hand or computer-aided methods. The theory and algorithms are then extended to a more general type of analysis. A computer program has been written to perform state reduction and state assignment on any type of sequential machine by using S.P. partitions in the unified concept presented. A problem-oriented language is included in this program to allow a designer to describe a sequential machine in a natural manner.